Transmission Line Effect: Bouncing Voltages

It's 4am on black Friday at Walmart. A single door opens and millions of people including yourself run to the entrance as one mob. You're running as fast as everybody around you. As the people near the building, those who luckily made it to the door enter the building. However, you, being at the front of the mob and having not run close enough to the door, smash into the outer walls of the building. The people behind you don't see the wall yet and keep running, pushing you into the wall even more. Soon enough, you have the collective force of thousands of people squishing you. 

The same thing happens with voltage. When entering a high impedance load (narrow doorway) from a low impedance cable (wide parking lot), voltage (pain) can spike up as you can see in the simulations below (Line C, top trace). The input voltage is only 100V, but the voltage at the load jumps up to 160V.

When you push back, the people behind you push the people behind them, and a wave of shoving propagates down the mob of people. When this wave reaches the end of the mob (the people at the very back) they push forward and that wave propagates back to you. This phenomenon is called ringing as demonstrated in the oscillation seen in the top trace.

Below are models of cabling. The inductor keeps the current going, just like you want to run at the same speed as the people behind you (to stay alive). The capacitor is like the space infront of you; it's somewhere to run to. Almost all conducting cables can be modeled this way, a chain of infinitesimally small units of L, R, and C. All cables have parasitic inductance and capacitance. Line D and the top trace demonstrates how doubling the cable length (double length of Line C) doubles the amount of time for the voltage to hit the load. This is just like having the parking lot double in length. It takes twice as long for you to run into the wall.

 Moral of the story:

• Walmart on black fridays is dangerous. 
• Unexpected voltage spikes fry parts when cables are too long or impedances are not matched.

Dual H-Bridge Board

Below is the result of one full week of thinking, layout, and planning. These H-bridges are made to control two small dc motors. The H-bridge can take up to a 500 mA load. This board will probably be integrated into my scrapbot. The simulation for this circuit can be found here.

I am currently working on a microcontroller to modularize the h-bridge unit. The plan is to be able to send serial instructions to the H-bridge driver microcontroller to drive the motor.

H-bridge simulation

I always believed that to build an H-bridge I needed to use FETs. I'm guessing that it was because of the small device package of Bipolar Transistors that I thought that it will not be able to power it. Well today I realized that some of my motors are probably small enough (low power) to be powered by BJTs. This also made for a great opportunity to test LTSpice some more. Eventually I hope to improve my mobot H-bridge design in efficiency using these tools.

Below are the results. You can see that the flyback diodes really do help protect by limiting the various potential differences to below their respective breakdown levels. The blue trace represents the input signal and the green trace is the voltage at one end of the inductor with respect to ground. 

Playing with Darlington Pairs

I wanted to light an LED without affecting the input impedance of the device I was measuring without buying a FET. Having the Darlington pair creates the digital-like steep ramp you see below in the simulation results by achieving the product of the current gains (beta) of each of the NPN transistors. The base resistor decreases the base current to a minimum to prevent affecting the load of V2. The green line shows the I-V relationship of voltage source V2 and its current output. You can see a slight change in slope (Ohms) at the output end, but it is negligible considering the purpose.

Back to Basics

After briefly reading my textbook, I decided to build a current mirror using random BJTs that were lying around. Q3 is there to reduce the base-current error. Since I don't have a desktop current source I decided to use a biased PNP transistor. This was a great opportunity for me to try the simulation capabilities of LTSpice. As you can see below, the LTSpice simulation closely matched the actual data.

Strangely, regardless of Q3, there was a 33% loss in the current mirror. This was probably because of the low current level I was mirroring. High beta values lead to higher error as well.